AMD posts Linux support for hardware-accelerated vIOMMU

AMD has posted version 5 of Linux kernel support for hardware-accelerated virtualized IOMMU (vIOMMU), letting guest IOMMU command buffers, event logs, and PPR logs run with far less hypervisor intervention.

Suravee Suthikulpanit of AMD authored the work on top of the IOMMUFD vIOMMU, vDevice, and nested-domain framework. When a guest touches the MMIO region that holds command-buffer, event-log, and PPR-log head and tail pointers, the IOMMU handles those accesses in hardware and reaches guest physical memory directly. That cuts the CPU cost and latency of the intercepts a hypervisor would otherwise take for every such operation. The host still traps and emulates the lower configuration MMIO used mainly at setup time.

The host side still has real work: enabling the feature, mapping MMIO between VMs and the IOMMU, maintaining GPA-to-SPA device table entries plus device-ID and domain-ID mapping tables, and backing a private address region the hardware uses as storage. New IOMMU commands and events specific to vIOMMU are part of the same effort. Nested attach programs host device-table entries with guest device and domain IDs so hardware can translate them, and translate-device-ID slots keep GPA-to-SPA walks for guest IOMMU traffic pointed at the nest-parent page tables.

This drop is deliberately incomplete. Hardware-queue and extended interrupt-remapping pieces needed for full guest AMD IOMMU virtualization are left for later series. Guest-visible IOMMUs still depend on VMM work outside this kernel code, including QEMU generating guest ACPI IVRS tables and wiring PCI topology for the IOMMU and pass-through VFIO devices. Jason Gunthorpe reviewed portions of the posting.