QEMU adds GICv5 virtualization for nested ARM guests

Peter Maydell has added virtualization support to QEMU’s Arm GICv5 interrupt-controller model, so the virt board can be started with GICv5 and virtualization turned on.

The change matters because GICv5 virtualization is substantially heavier than GICv3. In GICv3 most of the work is left to software and only the CPU interface has hardware help. GICv5 pushes far more of the virtual-interrupt machinery into the hardware, so both the CPU interface and the Interrupt Routing Service (IRS) must track virtual state: pending and active bits, targets, per-VPE highest-priority pending virtual interrupts, doorbells when a virtual PE is not resident, and paths that force cached virtual configuration out to guest memory for migration.

With the new support in place, QEMU passes the kernel’s vgic_v5 selftest and can boot an inner guest through to userspace under kvmtool. Upstream kernel support is not yet mainline but is already in the kvmarm development tree; matching kvmtool work is still unfinished.

Maydell would like the code in QEMU 11.2. Soft freeze is only about two weeks away and the series is large, so timing remains open.