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QEMU optional HMP, display CVEs, and board work

Databases & Infrastructure2026-08-23

QEMU development centered on security hardening and smaller attack surfaces, with fixes for two display-device CVEs and a large series to make the human monitor compile-time optional. Parallel work advanced IOThread observability plus new RISC-V and Arm machine models.

HMP made compile-time optional

A 49-patch v3 series on qemu-devel proposes making the Human Monitor Protocol optional through a --disable-hmp configure switch. The goal is a smaller attack surface for builds that do not need the legacy monitor. Maintainers of locked-down or minimal QEMU images should watch the series for reduced binary size and fewer exposed interfaces.

QXL hot-unplug use-after-free fixed

A patch introduces qxl_exit() so the QXL device unregisters its VM change-state handler and bottom halves on exit, closing CVE-2026-63322. The defect was a use-after-free reached during hot-unplug. Operators who expose QXL graphics should plan to pick up the fix.

VGA text-path OOB write closed

A QEMU change splits the VGA text renderer geometry cache from the graphics renderer, repairing an out-of-bounds write tracked as CVE-2026-77913. An earlier graphics-only fix left the text path unprotected. The separation keeps residual geometry state from corrupting memory when text mode is active.

IOThread holder tracking for query-iothreads

Version 13 of a 15-patch series adds explicit holder tracking so query-iothreads can list which devices and block exports own each IOThread. Prior v12 discussion refined the same observability design. Management tools and operators gain a clearer picture of IOThread attachment in multi-device guests.

TCG per-block dispatch micro-optimizations

A seven-patch v3 series in accel/tcg targets lower per-translation-block dispatch overhead for user-mode emulation. The patches are micro-optimizations along the TCG hot path. Workloads that execute many short blocks may see modest efficiency gains once merged.

Milk-V Duo machine support

A single author posted v4 of a seven-patch series that adds the Milk-V Duo board, CV1800B SoC support, dw8250 and clock stubs, plus tests and documentation. The work gives RISC-V developers another concrete machine model inside QEMU.

TI AM64x SoC and am64-virt machine

An RFC v2 series of 14 patches introduces the TI AM64x SoC and an am64-virt machine, covering RAT, DMSC, boot ROM, and tests. Arm embedded and industrial developers obtain an earlier path to emulate this platform.