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Apple USB4, Arm CCA KVM, and kernel hardening patches

Kernel & Low-Level2026-09-01

Several substantial patch series landed discussion on linux-kernel, spanning Apple Silicon interconnects, Arm confidential computing, and memory-management cleanups. Review activity was heaviest around Rust IRQ primitives and Arm CCA support.

Initial USB4 and Thunderbolt for Apple M1/M2/M3

A 19-patch series proposes the first ACIO/NHI driver and device-tree nodes enabling USB4/Thunderbolt on Apple M1, M2, and M3 SoCs. The work targets mainline support for these high-speed interconnects on Apple Silicon. Developers tracking Asahi or laptop bring-up will care because it opens external GPU, storage, and docking paths that previously required out-of-tree code.

Arm CCA support reaches KVM v16

The 45-patch v16 series continues adding Arm Confidential Compute Architecture support to KVM, covering confidential VMs and the Realm Management Monitor. Hardware testing feedback and multi-participant review accompanied the posting. This matters for anyone building or deploying confidential virtual machines on Arm servers once the feature is merged.

128-bit page table entries for arm64

Arm posted a 17-patch series introducing CONFIG_ARM64_D128 and support for 128-bit PTEs under FEAT_D128 (VMSAv9-128). The change extends the arm64 memory-management path to the wider descriptor format. It is relevant for future hardware that relies on the larger page-table entries for address-space or security extensions.

Refcounted IRQ disable and SpinLockIrq for Rust

Version 4 of a 17-patch set adds refcounted interrupt-disable primitives and SpinLockIrq bindings for Rust kernel code. Thomas Gleixner and Peter Zijlstra provided detailed review on preempt_count and irqflags semantics across more than 100 messages. Correct IRQ state handling is foundational for safe Rust drivers, so the discussion directly affects the growing Rust-for-Linux effort.

Unconditional per-VMA locks

A five-patch v6 series makes per-VMA locks unconditional across all configs and cleans up related code paths. The change enables simplifications in binder and networking, and Andrew Morton has picked up the set. Removing the config dependency reduces conditional complexity in the MM layer that many subsystems touch.

RISC-V IOMMU gains MSI remapping and VFIO

The v5 17-patch series for the RISC-V IOMMU adds MSI remapping, allowing IOMMU_DMA to be enabled by default and supporting VFIO device assignment. This brings the RISC-V IOMMU closer to feature parity needed for secure DMA and userspace device pass-through. Platform and virtualization developers on RISC-V gain a clearer path to production IOMMU use.

Buffer write-error handling no longer clears BH_Uptodate

A 21-patch v2 series stops clearing the BH_Uptodate flag when a buffer write fails and switches filesystems to a dedicated BH_Write_EIO flag. The adjustment prevents loss of up-to-date state on transient errors. Filesystem and block-layer maintainers benefit from more precise error accounting that avoids unnecessary re-reads.

Sigqueue flush UAF during non-leader exec

Developers identified a use-after-free in flush_sigqueue when a non-leader thread calls exec while POSIX timers remain armed; a patch switches the removal to list_del_init_careful(). The discussion involved multiple participants examining the race. The fix closes a narrow but real lifetime hole in the signal and timer paths.