Kernel fix corrects wrong TLB flush in page table reclaim
Direct reclaim after MADV_DONTNEED could free a page table while leaving a stale paging-structure cache entry.
By oopsDirect reclaim after MADV_DONTNEED could free a page table while leaving a stale paging-structure cache entry.
By oopsYosry Ahmed's series gives each nested guest its own ASID, matching VMX VPID practice and yielding 8-15% gains on recent AMD CPUs.
By kexecCore SMP call and x86 TLB flush paths no longer pin the caller for the full remote completion wait, cutting real-time scheduling latency.
By kexec