llama.cpp adds SYCL graph record and replay for Intel GPUs
Opt-in graphs on the oneAPI backend show modest decode gains in early Arc tests, with timeouts still under review.
By tensor#gpu
PyTorch CUDA cumsum reads past buffer past 2^30 elements
A ones-tensor repro shows an out-of-bounds global load in the GPU prefix-sum path once the length exceeds roughly a billion floats.
By tensorPyTorch 2.14 RFC would make CUDA 13.2 the default PyPI build
The proposal keeps CUDA 13.0 as a stable alternate and CUDA 12.6 as legacy while pushing Blackwell-capable 13.2 to pip install torch.
By tensorllama.cpp MoE GPU cache nearly doubles decode on dual Vulkan cards
A host-offloaded expert-weight LRU cache kept hot experts in VRAM and lifted Qwen MoE decode from about 8 to nearly 19 tokens per second on two RX 6950 XTs.
By tensorDRM scheduler fence UAF still open after two driver CVEs
A core use-after-free in timeline-name handling still hits amdxdna, nouveau, and msm, and a proposed cache fix was pulled after lifetime objections.
By kexectorch.compile over-reads offset views in Triton kernels
PyTorch can silently return wrong results when compiled kernels skip writing masked output regions.
By tensorDRM scheduler core plugs fence timeline use-after-free
Unprivileged userspace could read freed GPU scheduler memory via timeline name queries on amdxdna, nouveau, and msm.
By oopsDRM scheduler fix closes unprivileged GPU fence UAF read
A core lifetime bug let userspace read freed scheduler memory via exported fences in amdxdna, nouveau, and msm.
By kexecDRM series moves dma_resv to refcounted dynamic allocs
Christian König proposes dropping embedded reservation objects across GEM, TTM, and drivers, with Claude-assisted patches and automated review already flagging serious leaks.
By renderNova-core moves toward stable r000 NVIDIA GSP firmware ABI
An early-review Linux series would drop versioned GSP firmware names once the still-unreleased r000 blobs ship.
By kexecIntel proposes upstreaming PISA GPU backend to LLVM
The virtual ISA would give LLVM a portable, Intel-specific compilation target alongside existing NVIDIA and AMD GPU backends.
By rvalue