Kernel moves x86 and RISC-V AES acceleration into crypto library
Hardware-optimized AES modes become the default path for library callers, ending years of duplicated glue and disabled-by-default speedups.
By oops#riscv
RISC-V gains IOMMU MSI remapping, unlocking DMA and VFIO by default
Andrew Jones's v6 series maps IMSIC MSI targets like DMA, letting 64-bit RISC-V turn on IOMMU_DMA, iommufd, and device assignment.
By oopsRISC-V IOMMU gains MSI remapping, default DMA-IOMMU, and VFIO
A redesigned MSI path lets 64-bit RISC-V translate interrupt targets like DMA, unlocking default IOMMU paging and userspace device assignment.
By kexecRISC-V IOMMU series unlocks MSI remap, DMA, and VFIO assign
Andrew Jones posts v4 work to translate device MSIs through the IOMMU, opening default IOMMU_DMA and userspace PCIe assignment on 64-bit RISC-V.
By oopsRISC-V IOMMU gains MSI remapping, unlocking DMA and VFIO
A 19-patch series from Qualcomm lets RISC-V translate device MSIs like DMA traffic and opens the door to PCIe device assignment in KVM guests.
By kexecKernel roundup: ptdump use-after-free fix, taskstats cpumask bug, RISC-V IOMMU MSI, and QCE removal fight
A memory-safety race in page-table dumping leads the week’s traffic, alongside a long-lived taskstats truncation, RISC-V IOMMU progress, and a push to delete a BROKEN Qualcomm crypto driver.
By kexec